1. Field of the Invention
The present invention relates to a semiconductor chip assembly, and more particularly to a method of mechanically and electrically connecting a conductive trace to a semiconductor chip.
2. Description of the Related Art
Semiconductor chips have input/output pads that must be connected to external circuitry in order to function as part of an electronic system. The connection media is typically an array of metallic leads (e.g., a lead frame) or a support circuit (e.g., a substrate), although the connection can be made directly to a circuit panel (e.g., a mother board). Several connection techniques are widely used. These include wire bonding, tape automated bonding (TAB) and flip-chip bonding.
Wire bonding is by far the most common and economical connection technique. In this approach, wires are bonded, one at a time, from the chip to external circuitry by thermocompression, thermosonic or ultrasonic processes. In thermocompression bonding, fine gold wire is fed from a spool through a clamp and a capillary. A thermal source is swept past an end of the wire to form a wire ball that protrudes from the capillary. The chip or capillary is then heated to about 200 to 300xc2x0 C., the capillary is brought down over an aluminum pad, the capillary exerts pressure on the wire ball, and the wire ball forms a ball bond on the pad. The capillary is then raised and moved to a terminal on the support circuit, the capillary is brought down again, and the combination of force and temperature forms a wedge bond between the wire and the terminal. Thus, the connection between the pad and the terminal includes the ball bond (which only contacts the pad), the wedge bond (which only contacts the terminal) and the wire between the bonds. After raising the capillary again, the wire is ripped from the wedge bond, the thermal source is swept past the wire to form a new wire ball, and the process is repeated for other pads on the chip. Thermosonic bonding is similar to thermocompression bonding but adds ultrasonic vibration as the ball and wedge bonds are formed so that less heat is necessary. Ultrasonic bonding uses aluminum wire to form wedge bonds without applying heat. There are many variations on these basic methods.
TAB involves bonding gold-bumped pads on the chip to external circuitry on a polymer tape using thermocompression bonding. TAB requires mechanical force such as pressure or a burst of ultrasonic vibration and elevated temperature to accomplish metallurgical welding between the wires or bumps and the designated surface.
Flip-chip bonding involves providing pre-formed solder bumps on the pads, flipping the chip so that the pads face down and are aligned with and contact matching bond sites, and melting the solder bumps to wet the pads and the bond sites. After the solder reflows it is cooled down and solidified to form solder joints between the pads and the bond sites. Organic conductive adhesive bumps with conductive fillers in polymer binders have been used in place of solder bumps, but they do not normally form a metallurgical interface in the classical sense. A major advantage of flip-chip bonding over wiring bonding and TAB is that it provides shorter connection paths between the chip and the external circuitry, and therefore has better electrical characteristics such as less inductive noise, cross-talk, propagation delay and waveform distortion. In addition, flip-chip bonding requires minimal mounting area and weight which results in overall cost saving since no extra packaging and less circuit board space are used.
While flip-chip technology has tremendous advantages over wire bonding and TAB, its cost and technical limitations are significant. For instance, the cost of forming bumps on the pads is significant. In addition, an adhesive is normally underfilled between the chip and the support circuit to reduce stress on the solder joints due to thermal mismatch between the chip and the support circuit, and the underfilling process increases both manufacturing complexity and cost. Furthermore, the solder joints exhibit increased electrical resistance as well as cracks and voids over time due to fatigue from thermo-mechanical stresses. Finally, the solder is typically a tin-lead alloy and lead-based materials are becoming far less popular due to environmental concerns over disposing of toxic materials and leaching of toxic materials into ground water supplies.
U.S. Pat. No. 4,442,967 discloses a method of providing a raised contact portion on a microcircuit. A wire ball is formed on a wire end by applying thermal energy, the wire ball is pressed against a contact area on the microcircuit using thermocompression or thermosonic wire bonding to form a ball bond, a weakened area of the wire is created near the ball bond, and the wire is severed at the weakened area to provide a raised contact portion on the contact area. The contact portions thus obtained are relatively simple and economical compared to electroplated bumps. However, the contact portions do not yet provide an electrical connection to a support circuit. In order to make this connection, additional process steps are necessary, such as thermocompression bonding the contact portions to TAB inner leads, or disposing a conductive adhesive between the contact portions and bond sites in a flip-chip arrangement.
U.S. Pat. No. 4,661,192 discloses a method of bonding chips to support frames by providing ball bonds on chip pads using wire bonding, planarizing the ball bonds, coating the planarized ball bonds with conductive epoxy, and then registering and bonding the conductive epoxy to corresponding conductive patterns on support frames. Thus, multiple process steps are necessary to electrically connect the chips to the support frames after forming the ball bonds. In addition, care must be taken to ensure that the epoxy does not flow excessively and short the leads.
Conductive adhesives that electrically connect pads on chips to conductive traces on support circuits are well-known in the art. As mentioned above, organic conductive adhesive bumps with conductive fillers in polymer binders have been used, but they do not normally form a metallurgical interface in the classical sense. Moisture penetration through the polymer binder may induce corrosion or oxidation of the conductive filler particles resulting in an unstable electrical connection. Furthermore, the polymer binder and the conductive filler may degrade leading to an unstable electrical connection. Thus, the conductive adhesive may have adequate mechanical strength but poor electrical characteristics.
In view of the various development stages and limitations in currently available semiconductor chip assemblies, there is a need for a semiconductor chip assembly that is cost-effective, reliable, manufacturable, provides excellent mechanical and electrical performance, and complies with stringent environmental standards.
An object of the present invention is to provide a semiconductor chip assembly with a chip and a conductive trace that provides a low cost, high performance, high reliability package.
Another object of the present invention is to provide a convenient, cost-effective method for manufacturing semiconductor chip assemblies as chip scale packages, chip size packages, ball grid arrays or other structures.
In accordance with one aspect of the invention, a method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip, a conductive trace and a base, wherein the chip includes a conductive pad, the base includes a recess, the conductive trace includes a bumped terminal in the recess, the bumped terminal includes a cavity that extends into and faces away from the recess, the base contacts and covers the conductive trace on a side opposite the chip, and the conductive trace and the base are different metals, mechanically attaching the chip to the conductive trace using an insulative adhesive that extends into the cavity, etching the base thereby exposing the conductive trace, and forming a connection joint that contacts and electrically connects the conductive trace and the pad.
Preferably, the method includes etching the base to form the recess, electroplating the conductive trace onto the base, filling the adhesive into the cavity, sandwiching the adhesive between the conductive trace and the pad, and then etching the adhesive thereby exposing the pad after etching the base and before forming the connection joint.
The method may also include providing the conductive trace with a routing line outside the recess, and attaching the chip to the conductive trace such that the bumped terminal is inside a periphery of the chip and outside a periphery of the pad and the routing line overlaps the pad.
The method may also include forming an encapsulant on a side of the chip opposite the pad after attaching the chip to the conductive trace and before etching the base, and forming an insulative base on the conductive trace, the adhesive and the connection joint after etching the base.
In accordance with another aspect of the invention, a semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a bumped terminal and a routing line, wherein the bumped terminal includes a cavity that faces towards the chip, an insulative adhesive that contacts and is sandwiched between the conductive trace and the chip and extends into the cavity, and a connection joint that extends through an opening in the adhesive and contacts and electrically connects the conductive trace and the pad.
Preferably, the connection joint contacts a surface of the conductive trace that overlaps and faces away from the pad, the connection joint contacts opposing peripheral sidewalls of the conductive trace that overlap and are orthogonal to the pad, the connection joint is the only electrical conductor external to the chip that contacts the pad, the connection joint and the adhesive are the only materials external to the chip that contact the pad, the connection joint and the adhesive are the only materials that contact both the conductive trace and the pad, and the adhesive contacts and is sandwiched between the conductive trace and the pad.
An advantage of the present invention is that the semiconductor chip assembly includes a conductive trace with a bumped terminal that can be used for the next level assembly, and the bumped terminal includes a cavity that can be filled with the die attach adhesive. Another advantage is that the assembly need not include wire bonds and solder joints. Another advantage is that the assembly can be manufactured using low temperature processes which reduces stress and improves reliability. A further advantage is that the assembly can be manufactured using well-controlled wet chemical processes which can be easily implemented by circuit board, lead frame and tape manufacturers. Still another advantage is that the assembly can be manufactured using materials that are compatible with copper chip and lead-free environmental requirements.
These and other objects, features and advantages of the invention will be further described and more readily apparent from a review of the detailed description of the preferred embodiments which follows.